IRU3073CQTR【PDF 12/21 页】IC REG DL BCK/LINEAR 16-QSOP

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Sheet目录40

8页 9页 10页 11页 [12页]13页 14页 15页 16页

Rev. 1.0

09/17/03

IRU3073

www.irf.com

Cross Over Frequency:

The stability requirement will be satisfied by placing the

poles and zeros of the compensation network according

to following design rules. The consideration has been

taken to satisfy condition (20) regarding transconduc-

tance error amplifier.

These design rules will give a crossover frequency ap-

proximately one-tenth of the switching frequency. The

higher the band width, the potentially faster the load tran-

sient speed. The gain margin will be large enough to

provide high DC-regulation accuracy (typically -5dB to -

12dB). The phase margin should be greater than 458 for

overall stability.

Based on the frequency of the zero generated by ESR

versus crossover frequency, the compensation type can

be different. The table below shows the compensation

type and location of crossover frequency.

Table - The compensation type and location of zero

crossover frequency.

Detail information is dicussed in application Note AN-

1043 which can be downloaded from the IR Web-Site.

Where:

VIN = Maximum Input Voltage

VOSC = Oscillator Ramp Voltage

Lo = Output Inductor

Co = Total Output Capacitors

FO = R73C103 3

VIN

VOSC

2p3Lo3Co

---(21)

Figure 12 - Compensation network with local

feedback and its asymptotic gain plot.

In such configuration, the transfer function is given by:

The error amplifier gain is independent of the transcon-

ductance under the following condition:

By replacing ZIN and Zf according to Figure 7, the trans-

former function can be expressed as:

As known, transconductance amplifier has high imped-

ance (current source) output, therefore, consider should

be taken when loading the E/A output. It may exceed its

source/sink output current capability, so that the ampli-

fier will not be able to swing its output voltage over the

necessary range.

The compensation network has three poles and two ze-

ros and they are expressed as follows:

VOUT

Vp=VREF

R 5

R 6

C 10

C12

C11

FZ1

FZ2

FP2

FP3

E/A

ZIN

Frequency

Gain(dB)

H(s) dB

Comp

H(s) =

1+sR7 3(1+sR8C10)

(1+sR7C1 1)3[1+sC10(R6+R8)]

[ ( )]

sR6(C12+C1 1)

C12C1 1

C12+C1 1

gmZf >> 1 and gmZIN >>1 ---(20)

1 - g mZf

1 + g mZIN

VOUT

2p3C103(R6 + R8)

FZ2 = E

2p3C103R6

FZ1 =

2p3R73C1 1

FP1 = 0

FP3 = E

2p3R73

2p3R73C12

FP2 =

2p3R83C10

( )

C123C1 1

C12+C1 1

Compensator

Type

Type II (PI)

Type III (PID)

Method A

Type III (PID)

Method B

Location of Zero

Crossover Frequency

(FO)

FPO < FZO < FO < fS/2

FPO < FO < FZO < fS/2

FPO < FO < fS/2 < FZO

Typical

Output

Capacitor

Electrolytic,

Tantalum

Tantalum,

Ceramic

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